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CPUs and other things I don't understand too well.

hi_im_snowman
  • 6 months ago

I'm curious, why don't we see CPUs out there that are Pop-Tart sized to allow dramatically more current, produce less heat per square millimeter and be able to push 7 or even 8ghz per core?

I don't understand why this doesn't exist. My pc has the space. 1,200w power supplies exist. My wall outlet can push more than enough power. A PC tower surely has enough room to fit appropriately-sized cooling. Motherboards could be made to allow a new socket-type.

Why are companies ONLY fishing for 1nm+++ production on smaller and smaller chips? Why not have one division focused on making a fat, wide, bulky CPU that's pushing 2v and 8ghz for ultra-high performance users?

What am I missing?

Comments

  • 6 months ago
  • 3 points

A pop-tart size CPU on huge fab will have really high latency characteristics compared with condensed designs....

Moving the L2 cache to a position/size that is physically about as far away as RAM is in a current platform, would reduce it's performance to RAM-like performance.... See the problem?

  • 6 months ago
  • 1 point

Lets say we have a communication system and are sending the following phrase "Hello World". Lets say our signalling approach is to send each letter in the alphabet as a different tone and we decide to randomise the letter -> tone assignment. Tones are a mix of low and high frequencies. Due to propagation characteristics of the channel, some tones see a different delay to other tones (and will be received with different magnitude). This could result in the message received as "ellHo oWlrd". The characteristics of the channel are governed by the physics of electromagnetics for a transmission line or wireless environment we send signals through. The role of the system designer in this example is to formulate a tone and letter assignment that does not get smudged across the channel - i.e. he/she has to pick frequencies that do not suffer the same consequence of propagation delay.

This is one of the problems faced by chip designers.

It is obviously far more complicated for a CPU than this simple analogy because a CPU is produced by etching through "layers" of semi conducting (p and n type) and conducting surfaces. But if we pretend that the CPU is a set of interacting circuits, each connected by PCB traces, each gate of a transistor having a "circuit representation" and each PCB trace acting like a transmission line of a communication system, then the communication analogy somewhat holds. If the clock frequency is too high, the latency across the system could prohibit reliable transmission of instructions and other critical operations.

There are other practical reasons that require one to dive into Semi Conductor Physics and how Transistors actually work. From the material, the size of the gates, and the fan out of connecting many devices together.... The analogy of getting information from one end of a large array to another is easiest to conceptualise, but it is important to note that this is only One aspect in Chip Design. There is a reason why Chip Designers are well paid and only employed based on good Doctoral Dissertations and Research Track Records. It is a very complicated and multidisciplinary field. BTW, I am not a chip designer but worked in a team where one or two of my colleagues were (although they were more DSP chip designers than a modern Intel or AMD CPU).

  • 6 months ago
  • 1 point

What am I missing?

The laser printers they use to scan the plates that chips are cut out of haven't increased in size very much at all over the last several decades.

And they are cutting squares/rectangles out of round plates so if You made a pop tart sized chip You would be looking at something like 5-9 out of each plate versus hundreds.

[comment deleted]

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